1. Field of the Invention
This invention relates to electrically alterable nonvolatile semiconductor memories, and particularly to a semiconductor memory having means for examining a specific quality of memory cells which constitute the semiconductor memory.
2. Description of the Related Art
The published technical documents relating to this invention are:
Document 1; Reliability Aspect of a Floating Gate EEPROM, 1981, IEEE/Proc. IRPS P11-P16
Document 2; A 90 ns One-Million Erase/Program Cycle 1-Mbit Flash Memory, IEEE Journal of Solid-State Circuit, October, 1989, vol. 24, No. 5
Document 3; Technical Trend of EEPROM, May 10, 1990, Denpa Shimbun, Special Edition, Japan
Document 4; JP-A-63-291475
Many documents on the electrically alterable and nonvolatile, semiconductor memory (hereinafter, referred to as EEPROM) whose stored information is not lost when the power to the memory is turned off, have recently been published. In a method of holding the stored information even when the power to the memory is turned off, as described in the above-documents, a polysilicon layer (hereinafter, referred to as floating gate), which is electrically insulated when reading, is formed on a thin oxide film that is formed on a silicon substrate, and electrons or holes are injected into this floating gate when writing, thereby accumulating charges thereon.
To read information, a voltage is applied to a polysilicon electrode formed on the floating gate with an insulating film interposed therebetween. At this time, the information is judged depending on whether a current flows or not between the source electrode and the drain electrode which are formed adjacent to the thin oxide film. When many electrons are accumulated on the floating gate, no current flows, but otherwise, a current flows between the drain and source electrodes.
To write information, as shown, for example, in Document 1, a positive high voltage (for example, 15 through 20 V (volts)) is applied to the polysilicon electrode, and the drain electrode is grounded. Thus, a high electric field is produced at both ends of the thin oxide film so that electrons are injected into the floating gate by the principle of indirect tunneling. In addition, to extract electrons from the floating gate, a high voltage is applied to, for example, the drain terminal with the polysilicon electrode grounded, thus causing electrons to be discharged to the drain terminal.
In another method for writing information, as described in Document 2, a positive high voltage (for example, about 10 V (volts)) is applied to the polysilicon electrode, and also a positive voltage (for example, 5 V through 10 V) is applied to the drain electrode. Thus, electrons are injected into the floating gate by the mechanism of channel hot electron injection. In this method, the extraction of electrons is performed by the principle of indirect tunneling as in Document 1, in such a manner that a high voltage is applied to the source terminal thereby extracting electrons from the floating gate to the source terminal.
The contents of the memory are electrically altered by any method as mentioned above. In this case, since electrons and holes are passed through the thin oxide film during injection of electrons, the quality of the oxide film is deteriorated so that the electric charges accumulated on the floating gate may escape after writing as described in the above documents. The deterioration of the memory is caused by electrically altering its contents, and thus limits the number of times by which the memory elements (hereinafter, referred to as the memory cells) of EEPROM can be electrically altered without deterioration. The possible number of altering times is generally between ten thousand times and one million times per cell. The time necessary to electrically alter is about from one to 10 msec (milliseconds) for tunnel injection or about from one to 100 .mu.s (microseconds) for hot electron injection.
The degree of the deterioration depends most greatly on the quality of the thin oxide film, and relatively largely on the deviation in the manufacturing process. Since the deterioration of a memory cell is caused by the electrical altering of its contents, the degree of the deterioration of a memory cell cannot be precisely predicted before using the memory cell, and thus the possible number of times of altering of its contents cannot be estimated.
In the conventional EEPROM, to assure the possible number of times by which the memory cells can be electrically altered, the altering test is performed for each product before the actual shipping. On the basis of the test results, the degree of the deterioration is examined and the defective products are removed. This is described in, for example, Document 3. The test is applied to the memory cell which is actually to be used by the user. The altering test for each cell is made, for example, several hundred times through several thousand times.
As the memory capacity of the EEPROM increases, the time required for applying the altering test to all the memory cells which are to be used by the user before shipping becomes longer, resulting in increasing the product cost. As described in, for example, Document 2, it takes about 900 seconds to erase a one-megabit EEPROM 1000 times. The altering test for each memory cell before shipping decreases the remaining possible number of times of altering since each memory cell has a limited number of altering times.
In a semiconductor memory as disclosed in Document 4, an array of monitoring memory cells is added to the main memory cell array which is actually used for storing data, in order that a user can know the degree of deterioration of the main memory cell array before it is completely deteriorated. The possible number of times by which the monitoring cells can be altered, or its life is artificially made shorter than that of the main memory cells, for example, 80%, so that it is expected that when the life of monitoring cells have expired, the remaining life of the main memory cells is about 20%. However, although the user can be informed that the remaining life of the memory is short, it is not concerned with the prediction of the quality of the memory relating to the possible number of times of altering before it is actually used by a user.